1. Field of the Invention
The present invention relates to a multi-valued semiconductor memory device.
2. Description of the Related Art
In a semiconductor memory device such as a dynamic random access memory (DRAM) device, if m-bit information is stored in each memory cell, the storage capacity becomes m times that of a conventional single-valued memory device.
In a prior art four-valued DRAM device (see: JP-A-63-149900), three sense amplifiers are provided for one bit line pair, and also, dummy memory cells are provided. As a result, the chip area is still larger than the conventional single-valued devices, which reduces the manufacturing yield.